1. Field of the Invention
The present invention relates to stacked-type semiconductor devices and a method of fabricating the same.
2. Description of the Related Art
Recently, portable electronic equipment such as mobile telephones and non-volatile semiconductor memory media such as IC memory cards have been downsized, and there have been increasing demands for reducing the number of parts used in the equipment and media and downsizing thereof. Thus, there have been considerable activities in the development of efficiently packaging a semiconductor chip, which is an essential element among structural components used in the equipment and memory media.
As packages that meet the demands, there are a chip scale package (CSP) having a package size substantially equal to that of the semiconductor chip, a multi-chip package (MCP) in which multiple semiconductor chips are incorporated into a single package, and a package-on-package (POP) in which multiple packages are stacked and combined into a single-piece member.
FIG. 1 shows a conventional carrier for stacked-type semiconductor devices (Related Art 1). Referring to FIG. 1, a stacked type semiconductor device 1 includes an upper package 2 and a lower package 3. The upper package 2 includes a semiconductor chip 21, a substrate 22, and wires 23 connecting the semiconductor chip 21 and the substrate 22. A resin seal member 24 is formed by molding with a metal. The upper package 2 and the lower package 3 are electrically connected by solder balls 4.
FIG. 2 shows another conventional stacked type semiconductor device (Related Art 2). Referring to FIG. 2, a stacked type semiconductor device 50 includes packages 51 through 53, which are connected to a flexible board 54 by solder balls. Other conventional stacked type semiconductor devices are proposed in the following documents.
U.S. Pat. No. 6,121,676 discloses a stacked type semiconductor device with a flexible board like Related Art 2. Japanese Patent Application Publication No. 2001-111192 discloses a stacked type semiconductor device with spacers provided on an interposer and electrodes provided on side surfaces of the spacers, wherein a connection substrate connects the electrodes. Japanese Patent Application Publication No. 2000-294725 discloses a stacked type semiconductor device with interposes each having opposing surfaces on which interconnection lines are formed, in which interconnection lines provided on boards mutually connect the interconnection lines on the interposers. Japanese Patent Application Publication No. 2002-76167 discloses a stacked type semiconductor device with a laminate including multiple semiconductor chips having electrodes on sides thereof, these electrodes being connected by electrode connecting lines.
Conventionally, the packages to be stacked have a specific structure that enables electrodes (lands) of the upper and lower packages to be placed in position in the stacked state. Usually, it takes one to two months to produce molds for the upper and lower packages. Generally, it is required to prepare several sample packages having different specifications of devices to be packaged. For example, these sample packages may have various sizes. As a result, it takes a long time to present required samples.
The conventional flexible board employed in the stacked type semiconductor device has a bent portion, which may protrude from the stacked structure. This prevents downsizing of package.
The technique disclosed in Japanese Patent Application Publication No. 2001-111192 needs a space on the peripheral portions of the interposer for arranging the spacers. This is disadvantageous to reduction in the package area. The technique described in Japanese Patent Application Publication No. 2000-294725 needs areas for arranging electrodes on opposing peripheral portions of printed-circuit boards, which electrodes are connected by interposers. The technique described in Japanese Patent Application Publication No. 2002-76167 is directed to only the predetermined semiconductor chips, and is not suitable for stacking various types of semiconductor chips.
The present invention has been made in view of the above problems and has an object of providing a downsized stacked type semiconductor device producible by a shortened process time and a method of fabricating such a stacked type semiconductor device.
This object of the present invention is achieved by a stacked type semiconductor device comprising: semiconductor devices; interposers by which the semiconductor devices are stacked, the interposers having electrodes provided on sides thereof; and a connection substrate connecting the electrodes together. The electrodes provided on the sides of the multiple interposers are connected by the connection substrate, so that the connections can be made on only the sides of the interposers. This does not need a bent portion of the connection substrate and is thus advantageous to downsizing of the stacked type semiconductor devices. It is also possible to handle various types of semiconductor chips and reduce the delivery period.
The electrodes provided on the sides of the interposers may have parts of via holes defined by cutting. The via holes for electrodes can be formed by the identical production process. Thus, there is no need for additional parts such as connectors conventionally used, and the semiconductor devices can be fabricated at a reduced cost. The electrodes provided on the sides of the interposers may have parts of via holes defines by cutting and an electrically conductive resin with which the via holes are filled.
The electrodes provided on the sides of the interposers may be connected to the connection substrate by one of an electrically conductive adhesive or an anisotropically conductive film. The electrically conductive adhesive can be precisely applied to target portions by a dispenser or the like, so that the interposers and the connection substrate can be stably connected. The anisotropically conductive film may be substituted for the electrically conductive adhesive. Some advantages arise from the anisotropically conductive film. For example, the anisotropically conductive film can make electrical connections with only the electrodes. The anisotropically conductive film has an even thickness, which causes little errors in size. The anisotropically conductive film may be connection substrate beforehand, which may reduce the number of fabrication steps. The connection substrate may be a flexible substrate. It is thus possible to cope with variations in the distance between the interposers and prevent degradation of the production yield.
The connection substrate may have one of a single-layer interconnection structure or a multi-layer interconnection structure. Preferably, each of the interposers has multiple sides on which the electrodes are connected to the connection substrate.
The present invention may have an electronic component provided on an inside surface of the connection substrate. The electronic component can be mounted without enlarging the outer size of the device. Each of the interposers may be attached to an underlying one of the semiconductor devices. This enables stable positioning and prevents the yield from being degraded. Each of the interposers may be attached to an underlying one of the semiconductor devices by an adhesive. The use of adhesive enables stable positioning and prevents the yield from being degraded. The adhesive may be a film of adhesive, which has an even thickness. The use of the film-like adhesives can realize the parallelized arrangement at a high precision and prevents degradation of the production yield due to connection failures.
The present invention includes a method of fabricating a stacked type semiconductor device including: stacking semiconductor devices with interposers having electrodes provided on sides of the interposers; and connecting the electrodes together with a connection substrate. The connections are made on only the sides of the interposers, and have no need to have bent portions. This is advantageous to downsizing. It is also possible to handle various types of semiconductor chips and reduce the delivery period.
The method may further include forming the electrodes by cutting into the interposers along via holes provided therein. The via holes for electrodes can be formed by the identical production process. Thus, there is no need for additional parts such as connectors conventionally used, and the semiconductor devices can be fabricated at a reduced cost. The electrodes provided on the sides of the interposers may have parts of via holes defines by cutting and an electrically conductive resin with which the via holes are filled. The method may include forming the electrodes by cutting into the interposers along via holes provided therein, and filling the via holes with an electrically conductive adhesive.
The method may include: forming the electrodes by cutting into the interposers along via holes provided therein; providing a metal film on inner walls of the via holes; and supplying one of an electrically conductive adhesive or an anisotropically conductive film to the via holes. It is thus possible to connect the connection substrate to the interposers even if there is a difficulty in filling the via holes with the conductive adhesive.